Amazon

Sr. Signal Integrity Engineer, Amazon Devices

Posted On

Jan. 5, 2026

Location

Bengaluru, Karnataka

Experience Level

Freshers/Experienced

Job Type

Hardware Development

Apply By

Jan. 27, 2026

Job Description

Amazon Lab126 is an inventive research and development company that designs and engineers high-profile devices like the Kindle family of products. Lab126 began in 2004 as a subsidiary of Amazon.com, Inc. Since then, we have worked to produce best-selling e-readers and tablets, as well as new inventions like Echo line of products, Fire TV and Fire phone. What will you help us create?

Key job responsibilities
As a Senior Signal Integrity Engineer, you will be part of Validation team that is exploring new hardware designs to improve our devices. In this role, you will be responsible for Signal Integrity aspects, compliance, and interoperability of package substrate, PCB, Cable solutions and system-level SI for interfaces like PCIe, DDR, Clocks etc. You will also be responsible for contributing to package and platform design guideline development.

You will work closely with multi-disciplinary groups including Board Design, System Architects, IP developers, and Design Engineering, to verify and deliver complex, high volume SoCs that enable development of world-class hardware devices. In this role, you will be:
• Responsible for defining the design guidelines for internal and external design teams and delivering reference simulation docs for customers
• Performing modeling of package substrate/PCB channels elements in 3D/2D EM simulation tools.
• Working with silicon designers, platform designers, package designers, electrical validation teams, etc. to support interconnect and interface performance requirements.
• Reviewing and evaluating package and board design and providing review feedback.
• Responsible for providing power delivery solutions across platform, package and SOC level
• Definition of worst-case currents and voltage drop scenarios, MIM/decoupling allocation, grid choices and analysis, droop control, SOC ESD compliance, On-die droop detectors, usage of on-die delivery solutions like VR, LDO, and Power gates. - 8+ years of digital design in communication systems experience
- Master's degree in Electrical Engineering, or experience working in electrical engineering field
- Experience taping out chips that have gone into high volume production
- Experience low power design techniques
- 10+ years in working on validation of ASIC/SoC products
- High speed serial interface analog building blocks, protocol, specifications and test methods
- Familiarity with Simulation tools (ADS, HFSS, PowerSI, PowerDC, Hyperlynx) to execute SI-PI simulations is required.
- Experience with performing measurement, and correlating measurements to simulations.
- Experience with modeling and simulation of high-speed interface interconnects/channel.
- Excellent analytical and problem solving skills

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